We are a part of the Systems Research Group, focusing on the trustworthiness of cloud computing systems across various domains. Our research spans multiple areas, including the security and reliability of operating systems, cloud systems security, and confidential computing.

We explore the synergies of compilers (e.g., LLVM) and CPU architectures in establishing a reliable computing base. We leverage hardware extensions (e.g., ARM Memory Tagging Extension) and trusted execution environments (e.g., Intel SGX/TDX, AMD SEV) to provide efficient memory safety and security solutions for deployments in untrusted cloud infrastructures, considering multiple paradigms, including, but not limited to, WebAssembly applications and serverless computing. Additionally, since our target is mainly cloud environments that store and process users’ data, we aim to design systems that provide policy compliance with modern data privacy regulations (e.g., GDPR) in a secure, effective and performant manner.

NOTE: We’re looking for students who want to write BSc/MSc theses or participate in Guided Research. If you are interested, please check the application instructions.

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Current Active Projects

# Wallet: Lightweight Trustlets for Confidential Serverless Computing

With serverless computing becoming an increasingly popular deployment target, it is essential to consider the security and confidentiality implications it might have. In serverless deployments, the untrusted, potentially malicious provider is responsible for the infrastructure and can freely manage the executed functions. To enable confidentiality and trust in serverless functions deployed on third-party cloud infrastructures, we propose Wallet. Wallet is a framework that leverages AMD SEV-SNP VMPL to allow serverless functions to run in isolation from the guest OS and enables multiple mutually non-trusted functions to be executed and attested within the same CVM while keeping low startup times for the spawning of the functions.

Keywords: Confidential computing, Virtualization, Confidential VMs, AMD SEV, VMPL, Serverless computing

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# Cage: Hardware-Accelerated Safe WebAssembly

In Cage, we explore the design of a hardware-accelerated WebAssembly runtime that leverages hardware extensions such as Arm MTE (Memory Tagging Extension) and Arm PAC (Pointer Authentication). We design an extension to the WASM instruction set that exposes abstractions to manage tagged memory and pointer authentication and implement a compiler toolchain based on LLVM to harden unmodified applications, a modified standard library based on WASI, and a modified runtime based on wasmtime that implements the WASM abstractions by leveraging MTE and PAC.

Keywords: WebAssembly, Arm MTE, LLVM, Memory safety, Tagged-pointer approach

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# GDPRuler: Trusted GDPR monitor

Privacy rules and data governance regulations are in the spotlight in today’s tech world. Notably, it is a constantly evolving landscape (e.g. DMA, DSA, GDPR, CCPA). To comply with the imposed rules, companies are putting huge efforts to perform redesign of their applications and restructuring of their data management and storage enginges. Unfortunately, this often leads to high performance overheads (at the best case), considerable fines or even application discontinuation.
In this project, we propose GDPRuler, an end-to-end solution to provide GDPR compliance for KV stores without requiring modifications in their backend code and interfaces while providing security guarantees for GDPR metadata (both at rest and in transit) as well as a tamper-proof, formally-verified logging mechanism available for auditing by the authorities. Our system leverages confidential virtual machines (CVMs) to protect the code of the GDPR monitor from powerful adversaries. Further, it contains its own comprehensive and extensible policy language that can be used to express the GDPR articles, efficiently stores the GDPR metadata and effectively performs the appropriate runtime checks to ensure GDPR compliance.

Keywords: Privacy, Data protection, GDPR, TEEs, AMD SEV

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Past Projects

# SPP: Safe Persistent Pointers for Memory Safety

Memory safety violations, such as buffer overflows, are the primary cause of security and reliability issues in software systems. Like the volatile main memory, byte-addressable persistent memory (PM) storage devices are also prone to memory safety exploits because PM devices are directly mapped to the address space and accessed via the load/store interface using pointers.
In Safe Persistent Pointers (SPP), we propose a practical memory safety approach against buffer overflows for unmodified PM applications. SPP is based on a combination of tagged pointers, efficient persistent memory layout, and transactional updates to the memory safety metadata for ensuring crash consistency. SPP’s efficient pointer representation does not require additional memory lookup operations at runtime while incurring minimal space overheads for storing the memory safety metadata.

Keywords: Memory safety, Persistent memory, LLVM, Tagged-pointer approach, PMDK

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# SafePM: A Sanitizer for Persistent Memory

Byte-addressable persistent memory (PM), just like its volatile counterpart, is also susceptible to memory safety violations. While there is a couple of decades of work in ensuring memory safety for programs based on volatile memory, the existing approaches are incompatible for PM since the PM programming model introduces a persistent pointer representation for persistent memory objects and allocators, where it is imperative to design a crash consistent safety mechanism.
In SafePM, we introduce a memory safety mechanism that transparently detects both spatial and temporal memory safety violations for PM-based applications. SafePM is designed based on the shadow memory approach of AddressSanitizer (ASan), and augments it with crash consistent data structures and system operations to ensure memory safety even across system reboots and crashes.

Keywords: Memory safety, Persistent memory, Shadow-memory approach, Address sanitizer, PMDK

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# Anchor: A Library for Building Secure Persistent Memory Systems

Cloud infrastructure is shifting towards disaggregated setups, where byte-addressable persistent memory (PM) is becoming prominent. Although such an advancement enables the development of high-performance data management systems, their deployment on untrusted cloud environments also increases the security threats.
In Anchor, we design a library for building secure PM systems. Anchor leverages trusted execution environments (TEEs) and provides strong hardware-assisted security properties, while ensuring crash consistency. It further exposes APIs for secure data management within the realms of the established PM programming model, targeting byte-addressable storage devices. To achieve that, we design a PM engine that ensures strong security properties for the PM data, using confidential and authenticated PM data structures, while preserving crash consistency through a secure logging protocol. We further extend the PM engine to provide remote PM data operations via a secure network stack and a formally verified remote attestation protocol to form an end-to-end system.

Keywords: Security, Persistent memory, TEEs, Intel SGX, DPDK, PMDK

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Group Members

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Thesis / Guided Research / IDP:

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